It is well-known that the technique of gate on array (GOA)/gate in TFT-LCD panel (GIP) can reduce integrated circuit (IC) cost, reduce the board area around a panel, and reduce the Tact time of MOD Bonding. However, the stability, the reliability, the power consumption, etc. of the complicated GOA circuits of the panel become problems which are difficult to solve for designers. One gate line signal is output by a general GOA circuit through at least one shift register unit. Thus, for n gate lines, more than n+1 shift register units are required to form a completed circuit loop structure. Because external CLK and VGL lines enter the more than n+1 shift register units simultaneously in accordance with requirements, the power consumption and delay of signals become more serious.